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Xilinx & Intel FPGA debug with Exostiv

Xilinx & Intel FPGA debug with Exostiv

10 October 2019

 Exostive solution diagram

Since the first FPGA devices appeared the methods for probing signals within an FPGA design for real-time debugging have hardly changed.  These methods, which rely on slow speed serial interfaces such as JTAG to extract the captured signals from the FPGA, simply don’t meet the debug demands of the large complex designs implemented in today’s FPGA devices.  

The small window of observation provided by traditional embedded instrument solutions leaves engineers guessing which signals to scrutinise as well as which conditions to trigger upon.  FPGA designs take hours to synthesise and implement, meaning the debug ‘guessing’ process can cause serious delays to the resolution of issues and therefore to entire projects. Exostiv offers a cost effective, easy to use solution to this issue, providing engineers with access to thousands of signals within their designs as well as over 200,000 times more capture depth than current embedded instrument solutions.  Rare or non-repetitive events can now be captured with the deep trace depths and multi-capture features provided by the Exostiv solution.  Would you rather observe the equivalent to a few pixels of information from your design or whole frames of data? That is the power of Exostiv!

Come to the workshop and receive hands on training of FPGA debug methods and implementation of the Exostiv FPGA debugging solution for Xilinx & Intel FPGA devices.

Aimed at all engineers involved in FPGA design and debug, particularly those using high-end Xilinx & Intel devices. The workshop is also an excellent opportunity to meet other engineers working with latest generation of FPGA devices.

Venue: Maidenhead, Berkshire, UK

Timings: 9.30am - 3:30pm. Lunch & refreshments included.

Cost: First two places per company free of charge. Contact us if you need more places

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